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(R)
HIP5500
July 1998
WN ITHDRA PART W BSOLETE SS O PROCE IGNS W DES NO NE
File Number
3210.3
Features
* 500V Maximum Rating * 2A Peak Gate Drive
High Voltage IC Half Bridge Gate Driver
The HIP5500, a high voltage integrated circuit (HVIC) halfbridge gate driver for standard power MOSFETs, IGBTs, and the new Intersil Buffered MOSFET (RFV10N50BE), can be employed in a wide variety of switching regulator circuits. The HIP5500 combines the functionality and flexibility of a PWM IC with the convenience of a high voltage half-bridge driver optimized for power supply inverters. It can be used either open-loop or in closed-loop fashion using the SS input for controlling the output waveform duty-cycle. The HIP5500 incorporates a precision oscillator, adjustable using an external resistor and capacitor. The resistor sets the capacitor charging current and the capacitor sets the integration time of a triangle wave. Another resistor connected to the DIS pin adjusts the dead-time and can be tailored to the application. The oscillator switches at twice the output waveform fundamental frequency. The result is an output waveform whose positive and negative half-cycles are near perfect balance (volt-second equalization). Short-Detect (SD) and Soft-Start (SS) inputs provide alternative means for limiting and regulating respectively the half-bridge output voltage. A capacitor on the SS input will begin charging up once the EN input is made high and causes the duty cycle of each half-cycle to "ramp" the duty cycle of the output waveform. The SD input can sense a signal proportional to current, providing a means of shortening the conduction periods below that imposed by the SS input. Other circuits within the HIP5500 "match" upper and lower turn-on and turn-off propagation times in order to minimize flux imbalances when driving output transformer loads.
* Ability to Interface and Drive N-Channel Power Devices With Complimentary Outputs For Buffered FETs * Fault Output, Overcurrent Detection and Undervoltage Holdoff * Over 600kHz Sawtooth Oscillator Frequency * Adjustable Deadtime Control * Soft-Start Capability * Low Current Standby State * Sleep Mode Reduces Bias Current When Not Enabled
Applications
* Switching and Distributed Power Supplies * Electronic Lighting Supplies
Ordering Information
PART NUMBER HIP5500IP HIP5500IB TEMPERATURE RANGE -40oC to +85oC -40oC to +85oC PACKAGE 20 Lead Plastic DIP 20 Lead Plastic SOIC (W)
Pinout
HIP5500 (PDIP, SOIC) TOP VIEW
NC RT DIS NC CT SD FLT SS EN 1 2 3 4 5 6 7 8 9 20 HO 19 HO 18 VB 17 VS 16 NC 15 NC 14 GND 13 VCC 12 LO 11 LO
OSC 10
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2002. All Rights Reserved
HIP5500 Typical Application Block Diagram
POWER TRANSFORMER + LOAD
HO
OSC FLT SD + 500VDC EN DIS CT VCC RT + SS
HO HO VB VS LO LO GND TO BUFFERED FETs TO BUFFERED FETs
HO
BUFFERED FETs
LO
LO
15VDC
-
Functional Block Diagram
VCC FLT NOR LATCH
SD VCC
VB
VCC VB
UV OSC VCC
BUFFER
VS LEVEL SHIFT UPPER DRIVE HO HO VS
RT CT
OSCILLATOR VCC DFF D Q CK VCC QN
DIS
LOWER DRIVE
LO LO
CURRENT SOURCE SS
UV VCC
GND
EN
2
HIP5500
Absolute Maximum Ratings
Offset Supply Voltage, VS . . . . . . . . . . . . . . . . . . . . . -VBS to +500V Floating Supply Voltage (VB to VS) . . . . . . . . . . . . . . -0.3V to +18V High Side Channel Output Voltage, VHO, VNHO . VS -0.5 to VB +0.5 Fixed Supply Voltage, V CC . . . . . . . . . . . . . . . . . . . . -0.5V to +18V Low Side Channel Output Voltage . . . . . . . . . . . -0.5V to VCC +0.5V All Other Pin Voltages (SD, RT, CT, DIS, SS, EN and FLT) . . . . . . . . . -0.5V to VCC +0.5V Storage Temperature Range . . . . . . . . . . . . . . . . . -40oC to +150oC Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +125oC Lead Temperature (Soldering 10s). . . . . . . . . . . . . . . . . . . . +300oC (SOIC - Lead Tips Only) Offset Supply Maximum dv/dt, dVS /dt . . . . . . . . . . . . . . . . . . 50V/ns ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Information
Thermal Resistance JA Plastic DIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . 75oC/W Plastic SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . 80oC/W See Maximum Power Dissipation vs Temperature Curve Figure 21
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Recommended Operating Conditions (TJ = -40oC to +125oC Unless Otherwise Noted, All Voltages Referenced to VSS)
Offset Supply Voltage, VS . . . . . . . . . . . . . . . . . . . . -2.0V to +500V Floating Supply Voltage, V BS (VB to VS) . . . . . . . . . . +10V to +15V High Side Channel Output Voltage, VHO,VNHO . . . . . . . 0V to VBS Fixed Supply Voltage, V CC . . . . . . . . . . . . . . . . . . . . +10V to +15V Low Side Channel Output Voltage, V LO,VNLO. . . . . . . . . 0V to VCC All Other Pin Voltages (SD, RT, CT, DIS, SS, FLT and EN) 0V to VCC Discharge Time Constant . . . . . . . . . . . . . . . . . . . . . . . . . 100ns Min Discharge Resistor Range, RDIS . . . . . . . . . . . . . . . . . 1k to 50k Charging Resistor Range, R T . . . . . . . . . . . . . . . . . .6.8k to 400k Oscillator Capacitor Range, C T. . . . . . . . . . . . . . . . . 100pF to 0.1F Oscillator Frequency Range . . . . . . . . . . . . . . . . . . . . . 300kHz Max Oscillator Capacitor Charge Current Range, IRT . . . . . 21A to 5mA
Electrical Specifications
VCC = VBS = +15V, VS = GND = 0V, Unless Otherwise Specified TJ = +25oC TJ = -40oC TO +125oC MAX 7.0 400 3.0 3.5 145 8.5 9.5 9.7 0.7 4.5 1.1 MIN 60 7.4 7.4 7.6 0.05 3.4 0.85 MAX 8.0 435 5.0 160 8.6 9.6 9.8 0.75 4.6 1.15 UNITS mA A A mA A V V V V V V A
PARAMETER Quiescent VCC Current Quiescent VBS Current Quiescent Leakage Current Standby V CC Current SS Current Source Input Threshold Input Hysteresis Undervoltage Threshold Undervoltage Threshold Undervoltage Hysteresis Short Detect Threshold CT /RT Current Ratio HO, LO Peak Output Current HO, LO Peak Output Current
LO, HO Peak Output Current LO, HO Peak Output Current
SYMBOL IQCC IQBS ILK ISTBY ISFT/PWM V EN VEN-HYS VUVHL VUVLH VUVHYS V THSD ICTRAT IOUT + IOUT IBUF + IBUF -
TEST CONDITIONS
MIN -
TYP 5.5 300 0.4 2.0 110 7.8 2 8.6 8.8 0.3 4.0 1
(VS - GND) = 5.0V RT = 0
2 1/ V 3 CC < VSFT < /3V CC
70 7.5 -
Low to High Transition
High to Low Transition Low to High Transition
7.7 7.9 0.08 3.5
IRT = 100A, VCC /3 < VCT < 2/3VCC Sourcing, LO, HO = GND Sinking, LO, HO = VCC = VBS Sourcing, LO, HO = Vss Sinking, LO, HO = VCC = VBS
0.9
1.5 1.5 170 170
1.95 2.0 250 230
-
1.0 1.0 110 110
-
A A mA mA
3
HIP5500
Electrical Specifications
VCC = VBS = +15V, VS = GND = 0V, Unless Otherwise Specified (Continued) TJ = +25oC PARAMETER Soft-Start VTHRESH, Low to High Soft-Start VTHRESH, High to Low OSC Input Upper Threshold OSC Input Upper Threshold Oscillator Upper to Lower Threshold Difference OSC_OUT RDS ON, Sinking OSC_OUT RDS ON, Sourcing DIS Output On Resistance
FLT Output On Resistance
TJ = -40oC TO +125oC MAX 8.1 7.8 11.0 6.2 5.1 MIN 7.4 7.1 9.7 4.9 4.4 MAX 8.2 7.9 11.1 6.3 5.2 UNITS V V V V V
SYMBOL V TSSHL V TSSLH V TCTLH V TCTHL VCTDIF
TEST CONDITIONS CT = 7.5V
MIN 7.5 7.2 9.8
TYP 7.8 7.5 10.4 5.6 4.8
CT to DIS VT CTLH - VT CTHL IOSC_OUT = -50mA IOSC_OUT = 50mA IDIS = 10mA IFLT = 5mA
5.0 4.5
OSCRDSL OSCR DH RDSDIS RDSFLT
5 14 75 100
8.5 19 115 165
12 30 150 230
2 9 40
17 40 200 320

Dynamic Electrical Specifications VCC = VBS = +15V, GND = 0V, Unless Otherwise Specified
TJ = +25oC PARAMETER Turn-On Rise Time, HO, LO Turn-Off Fall Time, HO, LO Turn-On Rise Time, HO, LO Turn-Off Fall Time, HO, LO CT Fall to LO/HO Rise CT Rise to LO/HO Fall LO-HO Prop Delay Mismatch CT Rise to DIS Fall CT Fall to DIS Rise Minimum Dead Time Short Detect Propagation Delay Soft-Start Propagation Delay Time SYMBOL tDR tDF tDNR tDNF TPCTLH TPCTHL Delmatch TPCTDISHL TPCTDISLH tDTMIN tSDLO/HO tSSDLY SD = VTHSD, LO/HO = 200pF SS = VTSSLH, LO/HO = 200pF TEST CONDITIONS CL = 2000pF CL = 2000pF CBUF = 200pF CBUF = 200pF CT = VTCTHL LO/HO LOAD = 200pF CT = VTCTLH LO/HO LOAD = 200pF TPCTLH and TPCTHL CT = VTCTHL CT = VTCTLH MIN TYP 25 25 475 MAX 50 50 35 35 700 TJ = -40oC TO +125oC MIN MAX 925 UNITS ns ns ns ns ns
-
475
700
-
925
ns
-
60 300 600 200 425 500
450 800 850 750
-
475 825 1100 775
ns ns ns ns ns ns
4
HIP5500 Typical Performance Curves
100.0 50 LEAKAGE CURRENT (A) 20 10.0 5 2 1.0 0.5 0.2 0.1 0.05 0.02 0.01 0.005 -40
All Curves are V CC = +15V, TA = +25oC, Unless Otherwise Specified
6.4 6.2 6.0 5.8 5.6 5.4 5.2 5.0 4.8 4.6 4.4 4.2 4.0 3.8 3.6 3.4 -40 QUIESCENT VCC SUPPLY CURRENT (mA)
VCC = 15V
VCC = 12V VCC = 10V -20 0 +20 +40 +60 +80 TEMPERATURE (oC) +100 +120
-20
0
+20 +40 +60 +80 TEMPERATURE (oC)
+100
+120
FIGURE 1. OFFSET SUPPLY LEAKAGE CURRENT vs TEMPERATURE AT 300VDC
325
FIGURE 2. QUIESCENT V CC CURRENT vs TEMPERATURE AND V CC SUPPLY VOLTAGE
3.4 3.2 3.0 2.8 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4
VBS = 15V STANDBY CURRENT (mA)
QUIESCENT FLOATING BIAS SUPPLY CURRENT (A)
275 VBS = 12V 225
VCC = 15V
VCC = 12V
175 VBS = 10V 125 -40
VCC = 10V -40 -20 0 +20 +40 +60 TEMPERATURE (oC) +80 +100 +120
-20
0
+20 +40 +60 +80 TEMPERATURE (oC)
+100
+120
FIGURE 3. QUIESCENT FLOATING BIAS SUPPLY CURRENT vs TEMPERATURE AND V BS SUPPLY VOLTAGE
ENABLE/DISABLE THRESHOLD VOLTAGE (% OF VCC) 65 VCC = 10V VCC = 12V VCC = 15V
FIGURE 4. QUIESCENT STANDBY CURRENT vs TEMPERATURE AND VCC SUPPLY VOLTAGE
ENABLE/DISABLE HYSTERESIS VOLTAGE (V) 2.0 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 -40 -20 0 +20 +40 +60 +80 TEMPERATURE (oC) +100 +120 VCC = 12V VCC = 15V
60
55
50
VCC = 10V VCC = 12V VCC = 15V
45
VCC = 10V
40
35 -40
-20
0
+20 +40 +60 +80 TEMPERATURE (oC)
+100
+120
FIGURE 5. ENABLE/DISABLE THRESHOLD (PERCENT V CC) vs TEMPERATURE AND V CC SUPPLY VOLTAGE
FIGURE 6. ENABLE/DISABLE HYSTERESIS VOLTAGE TEMPERATURE AND VCC SUPPLY VOLTAGE
5
HIP5500 Typical Performance Curves
120 SOFT-START CURRENT SOURCE (A) 1.9 FAULT_NOT OUTPUT VOLTAGE (V) 1.7 1.5 1.3 1.1 0.9 0.7 0.5 -40 VCC = 10V VCC = 12V VCC = 15V
All Curves are V CC = +15V, TA = +25oC, Unless Otherwise Specified (Continued)
110
100 VCC = 15V VCC = 12V VCC = 10V
90
80 -40
-20
0
+20
+40 +60 +80 TEMPERATURE (oC)
+100
+120
-20
0
+20 +40 +60 +80 TEMPERATURE (oC)
+100
+120
FIGURE 7. SOFT-START CURRENT SOURCE CURRENT vs TEMPERATURE AND VCC SUPPLY VOLTAGE
CT TRIGGER/DISCHARGE VOLTAGES (% OF VCC 100 VCC = 15V VCC = 12V VCC = 10V
FIGURE 8. FAULT_NOT LOW LEVEL OUTPUT VOLTAGE vs TEMPERATURE AND V CC SUPPLY VOLTAGE, SINKING 5mA
1.00
CT TO RT CURRENT RATIO
80
0.98
60
0.96
40
0.94
20
VCC = 15V VCC = 12V VCC = 10V -20 0 +20 +40 +60 +80 +100 +120
0.92
0 -40 TEMPERATURE (oC)
0.90 -40 -20 0 +20 +40 +60 +80 TEMPERATURE (oC) +100 +120
FIGURE 9. C T RAMP TRIGGER AND DISCHARGE VOLTAGE TRIP POINT vs TEMPERATURE AND VCC SUPPLY VOLTAGE
FIGURE 10. CT TO R T CURRENT SOURCE RATIO vs TEMPERATURE
27.5 SD THRESHOLD VOLTAGE (% OF VCC) VCC = 15V VCC = 12V VCC = 10V
27.0
26.5
26.0
25.5
25.0 -40
-20
0
+20 +40 +60 +80 TEMPERATURE (oC)
+100
+120
FIGURE 11. SHUTDOWN THRESHOLD VOLTAGE (% OF VCC) vs TEMPERATURE AND VCC SUPPLY VOLTAGE
6
HIP5500 Typical Performance Curves
340 320 300 280 260 240 220 200 180 160 140 120 100 80 60 -40
All Curves are V CC = +15V, TA = +25oC, Unless Otherwise Specified (Continued)
340 320 300 280 260 240 220 200 180 160 140 120 100 80 60 -40 VCC = 15V
SOURCING CURRENT (mA)
VCC = 15V
SINKING CURRENT (mA)
VCC = 12V
VCC = 12V
VCC = 10V
VCC = 10V
-20
0
+20 +40 +60 +80 TEMPERATURE (oC)
+100
+120
-20
0
+20
+40 +60 +80 TEMPERATURE (oC)
+100
+120
FIGURE 12. BUFFER GATE OUTPUT SHORT CIRCUIT SINKING CURRENT vs TEMPERATURE AND V CC SUPPLY VOLTAGE
UNDER-VOLTAGE THRESHOLD VOLTAGES (V) 10.0
FIGURE 13. BUFFER GATE OUTPUT SHORT CIRCUIT SOURCING CURRENT vs TEMPERATURE AND VCC SUPPLY VOLTAGE
UNDER-VOLTAGE THRESHOLD VOLTAGE (V) 10.0 TRIP
9.5
9.5
9.0 TRIP 8.5
9.0
8.5 RESET 8.0
8.0
RESET
7.5 -40
-20
0
+20
+40
+60
+80
+100
+120
TEMPERATURE (oC)
7.5 -40
-20
0
+20
+40 +60 +80 TEMPERATURE (oC)
+100
+120
FIGURE 14. LOW-SIDE UNDERVOLTAGE THRESHOLD VOLTAGE (TRIP/RESET) vs TEMPERATURE
1.0 PROPAGATION DELAY (s) 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 -40
FIGURE 15. HIGH-SIDE UNDERVOLTAGE THRESHOLD VOLTAGE(TRIP/RESET) vs TEMPERATURE
1.0
PROPAGATION DELAY (s)
0.8 CT -DIS FALL 0.6
0.4
CT -DIS RISE
0.2
-20
0
+20 +40 +60 +80 TEMPERATURE (oC)
+100
+120
0.0 -40
-20
0
+20
+40 +60 +80 TEMPERATURE (oC)
+100
+120
FIGURE 16. PROPAGATION DELAY, CT TO GATE OUTPUTS vs TEMPERATURE AT VCC = +15V
FIGURE 17. PROPAGATION DELAY, C T TO DIS vs TEMPERATURE AT VCC = +15V
7
HIP5500 Typical Performance Curves
1.6
All Curves are V CC = +15V, TA = +25oC, Unless Otherwise Specified (Continued)
1.0 0.9 PROPAGATION DELAY (s)
PROPAGATION DELAY (s)
0.8 0.7 0.6 0.5 0.4 0.3
SD-LO FALL
1.2
SD-LO RISE
0.8
0.4 -40
-20
0
+20
+40
+60
+80
+100
+120
TEMPERATURE (oC)
0.2 -40
-20
0
+20
+40
+60
+80
+100
+120
TEMPERATURE (oC)
FIGURE 18. PROPAGATION DELAY, SS TO LO GATE RISING vs TEMPERATURE AT VCC = +15V
1.0 0.9 PROPAGATION DELAY (s)
FIGURE 19. PROPAGATION DELAYS, SD TO LO GATE RISE/FALL vs TEMPERATURE AT VCC = +15V
3 2.75 POWER DISSIPATION (W) 2.5 2.25 2 1.75 1.5 1.25 1 0.75 0.5 0.25 0 -40 HIP5500IP HIP5500IB
0.8 0.7 0.6 0.5 0.4 0.3 0.2 10 11 12 13 SUPPLY VOLTAGE (VCC) 14 15
-20
0
+20
+40
+60
+80
+100
+120
AMBIENT TEMPERATURE (oC)
FIGURE 20. PROPAGATION DELAY, C T TO GATE OUT vs SUPPLY VOLTAGE, VCC AT +25oC FOR RISING AND FALLING GATE OUTPUTS
HIGH VOLTAGE POWER DISSIPATION (W) 1.0 VBS = VCC = 15V CL = 100pF TA = +25 oC
FIGURE 21. MAXIMUM POWER DISSIPATION vs TEMPERATURE
10
POWER DISSIPATION (W)
VS = 400V VS = 300V VS = 200V VS = 100V
VS = VSS = COM VBS = VCC = 15VDC TA = +25 oC
0.1
1.0
2100pF 0.1 907pF 100pF
0.01
0.001 10
100 SWITCHING FREQUENCY (kHz)
1000
0.01 10
100 SWITCHING FREQUENCY (kHz)
1000
NOTE: All switching losses assumed to be in IC. FIGURE 22. HIGH VOLTAGE POWER DISSIPATION vs SWITCHING FREQUENCY FIGURE 23. LOW VOLTAGE POWER DISSIPATION vs FREQUENCY
8
VBUS
RSD VS RT U1 J2 HO1 20 NC RG1 1 3 DBS NC NC RBS J3 J4 RG2 NC C4 CZ 3 C D 1 Q2 C2 2 OUT2 2 CBS Q1 1 HO2 19 VB 18 VS 17 NC4 16 NC3 15 GND 14 VCC 13 LO2 12 LO1 11 2 OUT1 A B CTAP J1 C3 C1 NC RDIS 3 DIS NC 5 CT R1 LED1 7 FLT 8 SS CT1 CSS HIP5500 10 OSC 9 EN 6 SD 4 NC2 2 RT 1 NC1 CY
9
C5 GND +15VDC VCC COM
SD
CT
HIP5500
SS
VCC
CX
REN
EN
OSC
FIGURE 24. EVALUATION BOARD SCHEMATIC
HIP5500
COM
VBUS C1 CY C2
U1 RG1 CT SD SS EN OSC +15VDC VCC C5 LED1 CZ C4 CX CT 1 CSS CBS RT RDIS RSD REN R1 DBS 1 Q2 C3
RBS RG2
Q1 1
HIP5500
C GND TRANSFORMER T1 GND
D
A
CTAP
B
FIGURE 25. HIP5500 EVALUATION BOARD SILKSCREEN
10
HIP5500 Dual-In-Line Plastic Packages (PDIP)
N INDEX AREA E1 12 3 N/2 -B-AD BASE PLANE SEATING PLANE D1 B1 B 0.010 (0.25) M D1 -CA2 L A1 A C L E
E20.3 (JEDEC MS-001-AD ISSUE D) 20 LEAD DUAL-IN-LINE PLASTIC PACKAGE
INCHES SYMBOL A A1 A2 B B1 C D D1 E E1 e eA eB L N eA eC
C
MILLIMETERS MIN 0.39 2.93 0.356 1.55 0.204 24.89 0.13 7.62 6.10 MAX 5.33 4.95 0.558 1.77 0.355 26.9 8.25 7.11 NOTES 4 4 8 5 5 6 5 6 7 4 9 Rev. 0 12/93
MIN 0.015 0.115 0.014 0.045 0.008 0.980 0.005 0.300 0.240
MAX 0.210 0.195 0.022 0.070 0.014 1.060 0.325 0.280
e
C A BS
eB
NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication No. 95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
0.100 BSC 0.300 BSC 0.115 20 0.430 0.150 -
2.54 BSC 7.62 BSC 10.92 3.81 20 2.93
11
HIP5500 Small Outline Plastic Packages (SOIC)
N INDEX AREA H E -B1 2 3 SEATING PLANE -AD -CA h x 45o 0.25(0.010) M BM
M20.3 (JEDEC MS-013-AC ISSUE C) 20 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
INCHES SYMBOL A A1 B C D E e H
C
MILLIMETERS MIN 2.35 0.10 0.33 0.23 12.60 7.40 10.00 0.25 0.40 20 8o 0o 8o MAX 2.65 0.30 0.51 0.32 13.00 7.60 10.65 0.75 1.27 NOTES 9 3 4 5 6 7 Rev. 0 12/93
MIN 0.0926 0.0040 0.013 0.0091 0.4961 0.2914 0.394 0.010 0.016 20 0o
MAX 0.1043 0.0118 0.0200 0.0125 0.5118 0.2992 0.419 0.029 0.050
L
e
B 0.25(0.010) M C A M BS

A1 0.10(0.004)
0.050 BSC
1.27 BSC
h L N
NOTES: 1. Symbols are defined in the "MO Series Symbol List" in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension "E" does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. "L" is the length of terminal for soldering to a substrate. 7. "N" is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width "B", as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact.
12

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